Editorial Office:
Management:
R. S. Oyarzabal
Technical Support:
D. H. Diaz
M. A. Gomez
W. Abrahão
G. Oliveira
Publisher by Knobook Pub
doi: 10.6062/jcis.2019.10.01.0155
(Free PDF)O. de Souza Martins Gomes and R. L. Moreno
This article describes the implementation of Twofish - one of the Advanced Encryption Standard (AES) finalists, in Field Programmable Gate Array - FPGA. The core was implemented in Altera Quartus Cyclone board. The code is totally portable and can be used in any FPGA. The algorithm was implemented for 128-bit word and 128, 192 and 256-bit keys. The main goal of this work was the implementation of an efficient, compact and modular Twofish hardware module that can find a wide range of applications as an alternative from AES-Rijndael.
Cryptography, Twofish, AES, FPGA, Communication.