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Implementation of a Blind Source Separation Algorithm in a Heterogeneous Computing Architecture

doi: 10.6062/jcis.2019.10.02.0159

(Free PDF)

Authors

O. Fratini Filho and R. Suyama

Abstract

The statistical method Independent Component Analysis (ICA) has been successfully used to solve the problem of Blind Source Separa- tion (BSS). However, in applications that require real-time operation, it is of great interest as such techniques are implemented in embed- ded systems, for which it is necessary to obtain a balance between performance and the cost required for its implementation. Therefore, this paper proposes a heterogeneous computing architecture basaed on a Field-Programmable Gate Array (FPGA) Cyclone IV, present in the DE0-Nano Kit. The architecture is composed of a subsystem that implements the algorithm FastICA, implemented using the DSP Builder library, and the Nios II microprocessor. In order to reduce the computational complexity, a fixed point representation was used, which allowed a reduction in the number of Embedded Multipliers and Logic Elements used, thus maximizing the operating frequency. The algorithm implemented in the proposed architecture achieved a per- formance comparable to other proposals in the literature, but with a reduced implementation cost and the flexibility introduced by the Nios II microprocessor.

Keywords

BSS, ICA, FastICA, FPGA, Heterogeneous Computing.

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